1. Field of the Invention
This invention relates to the field of semiconductor processing and, more particularly, to a method and apparatus that monitor the performance of an ion implanter to ensure its calibration.
2. Description of Relevant Art
Fabrication of a metal-oxide-semiconductor ("MOS") transistor is well-known. Fabrication typically begins by lightly doping a single-crystal silicon substrate n-type or p-type. The specific area where the transistor will be formed is then isolated from other areas on the substrate using various isolation structures. A gate dielectric is then typically formed by oxidizing the silicon substrate. A gate conductor is then patterned using a photolithography mask from a layer of polycrystalline silicon ("polysilicon") deposited upon the gate dielectric. The polysilicon is rendered conductive with the introduction of ions from an implanter or a diffusion furnace. Subsequently, source and drain regions are doped with a high-dose n-type or p-type dopant. If the source and drain regions are doped n-type, the transistor is referred to as NMOS, and if the source and drain regions are doped p-type, the transistor is referred to as PMOS. A channel region between the source and the drain is protected from the implant species by the pre-existing gate conductor. When voltage above a certain threshold is applied to the gate of an enhancement-mode transistor, the channel between the source and drain becomes conductive and the transistor turns on.
The amount of dopants introduced into the source and drain regions and the polysilicon gate conductor of a transistor are critical to the performance of the device. Chemical diffusion is one method currently used to introduce dopants into semiconductors. Diffusion is the process by which a species moves as a result of the presence of a chemical barrier. A typical diffusion system consists of a heating element, diffusion tube, and dopant delivery system. The dopant sources can be gaseous (the most common), liquid (bubbler or spin-on), or solid (tablet, powder, or disk). Many wafers can be doped at the same time using chemical diffusion. However, chemical diffusion does not have good control over the amount of dopants introduced into the wafers and the location of where the dopants are introduced.
During the past 25 years, ion implantation has become the preferred technology for introducing dopants into target materials used in semiconductor processing. Ion implantation is a process in which energetic, charged atoms or molecules are accelerated by an ion implanter and then directed toward the semiconductor substrate. Acceleration energies can range from 10 keV to several MeV for high-energy implant systems.
FIG. 1 shows a schematic of an ion implanter. Ion source 10 ionizes the species to be implanted to form a plasma at low pressure, typically 10.sup.-3 torr. A voltage difference in the range of 15-40 kV is then applied between ion source 10 and plates 12 to extract and accelerate the ions which now form beam 14. Beam 14 is subsequently routed through analyzing device 16, typically a magnet, which spatially separates the beam according to the ionic mass of its constituents. The analyzer directs only ions with a specific mass toward the target while impurities with different ionic masses are disposed elsewhere.
Acceleration tube 18 creates an acceleration field to further increase the ion energy to the desired energy level. Tube 18 may also be used to decelerate the ions if the desired implantation energy is less than the extracted energy. Focusing ring 20 is used to focus the beam into a ribbon or round shape depending on the application. Plates 22 separate out any neutral components of the beam. As a result, neutral beam 24 is unaffected by plates 22 and is separated from ion beam 26 which is bent toward wafer target 28. Neutral beam 24 is stopped by target 30.
Scanner plates 32 (x-axis) and 34 (y-axis) are responsible for controlling the position of the ion beam over the surface of the wafer. By applying the appropriate timing control sequence to the plates, the whole wafer may be scanned by the ion beam. The timing control sequence applied to the plates is such to ensure a uniform dopant distribution across the entire surface of the wafer.
Ion implantation has the ability to precisely control the number of implanted dopant atoms into substrates to within 3%. For dopant control in the 10.sup.14 -10.sup.18 atoms/cm.sup.3 range, ion implantation is clearly superior to chemical diffusion techniques. Mass separation by the ion implanter ensures a very pure dopant. Ion implantation is used throughout the semiconductor manufacturing process. Low dose (10.sup.11 -10.sup.12 ions/cm.sup.3) ion implantation can be used to adjust the threshold voltage of transistors by implanting the channel region to change its doping concentration. Ions can be introduced into the semiconductor substrate to create the source and drain regions of transistors. The polysilicon gate structure of a transistor may also be doped to become conductive at the same time the source and the drain are doped. Ion implants can be used to increase the threshold voltage of parasitic transistors in order to minimize the probability of a turn-on of such a transistor.
Heavy doping with an ion implanter can be used to alter the etch characteristics of materials for patterning. The implantation may be performed through materials that may already be in place while other materials may be used as masks to create specific doping profiles. Furthermore, more than one type of dopants may be implanted at the same time and at the same position on the wafer. Other advantages include the fact that ion implantation may be performed at low temperature which does not harm photoresist and in high vacuum which provides a clean environment.
It is important to monitor the performance of the ion implanter to ensure that the correct amount of dose is implanted into each wafer and that the implanter remains calibrated between ion implantations. In many instances, monitor and test wafers are exposed to the implanter prior to exposing actual product wafers. These test wafers are either void of device structures or have arrays of test structures designed for measuring, the parameters of interest.
The four-point sheet resistance method is the most commonly used technique for measuring implantation dosages because of its versatility. A rapid thermal anneal ("RTA") step must first follow the ion implantation step in order to diffuse and activate the implanted ions. In addition, the RTA step repairs any damage to the crystal structure that occurred during the ion implantation step. An RTA process is typically performed at 420.degree.-1150.degree. C. and lasts anywhere from a few seconds to a few minutes. Large area incoherent energy sources ensure uniform heating of the wafers to avoid warpage. Various heat sources are utilized, including arc lamps, tungsten-halogen lamps, and resistively-heated slotted graphite sheets. Most heating is performed in inert atmospheres (argon or nitrogen) or vacuum, although oxygen or ammonia for growth of silicon dioxide and silicon nitride may be introduced into the RTA chamber. The resistance measurements using four co-linear probes follow the thermal anneal. Current is introduced by the two outer probes while the two inner probes measure the voltage drop. Doses ranging from 10.sup.11 -10.sup.16 ions/cm.sup.2 can be measured using the four-point sheet resistance method.
The four-point sheet resistance method is relatively time consuming since it involves a two-step process (annealing and measuring resistance), which can reduce the overall wafer throughput. Furthermore, the intermediate anneal step is an additional variable in the process of determining the consistency and calibration of the ion implanter. A more reliable, one-step method for examining the performance of an ion implanter is the thermawave method. A thermawave measures the damage that the implant causes to the upper surface of the wafer. An argon pump laser is directed toward the surface of the wafer to generate a thermal and electron-hole plasma waves. A HeNe probe laser measures the change in reflectivity induced by the argon laser at a second position on the surface of the wafer. The reflectivity is indicative of the damage on the surface due to the ion implantation.
Typical surface damage on a wafer is shown in FIG. 2. Wafer 40 is implanted with ions 42 to form doped region 44 near the upper surface of wafer 40. Expanded view 46 shows a detailed view of the arrangement of atoms close to the surface. Silicon atoms are shown by hollow circles (.smallcircle.) and dopant atoms by solid circles (.cndot.). Silicon atoms are shown displaced, and in some cases replaced, by dopant atoms. Dopant atoms are either in places of silicon atoms or in between them.
As the implantation energy increases, the additional energy provided begins to repair the surface damage. As a result, for high energy implants, the damage to the wafer surface is not enough to be measured by the thermawave method. FIG. 3 shows the resulting damage to a wafer surface from a high energy implant. Wafer 50 is implanted with high energy ions 52 to form doped region 54 near the upper surface. Expanded view 56 shows a detailed view of the arrangement of atoms close to the surface. Most of the damage caused by the high energy ions is repaired due to additional energy provided to the wafer.
Independent of the method used to monitor the implantation dosage, the test wafers are not reusable. After the first implantation, a new set of wafers must be used. Replacing the test wafers after every set of measurements can be very costly.
It would be desirable to have a one-step method to monitor the performance of the ion implanter. A one-step method introduces no additional variables that could affect the implanted ions and thus provides a more accurate information on the performance of the ion implanter. It would also be desirable to have a one-step method which can monitor the performance of the ion implanter for low, medium, and high implantation energies. It would additionally be desirable to be able to reuse test wafers for more than just one ion implanter test.